PCB design challenges– In many systems processors use multiple interfaces including I2C, GPIO, and I2S to collect data from peripherals and sensors. In some of these systems PCB real estate is a premium in addition designers are going with smaller PCBs that connect together to fit into neat looking industrial designs. Routing signals through congested PCBs and connectors presents some challenges.
System Design Challenges– Connectors are the single highest contributor to system reliability. They also consume valuable PCB and system space, which is especially critical in hinged applications such as in notebooks. Single Wire Aggregation allows you to reduce your connector and cable size while increasing your reliability.
Flexible & robust options– The single wire communication between the FPGAs is around 7.5 Mbps. The design is also configurable, the number of I2C/I2S busses and GPIOs and single wire protocol packet length can be adjusted. The single wire protocol between the FPGAs is robust with error detection and retry features.
FPGA Design Challenges– Field Programmable Gate Arrays (FPGAs) are amazing devices. With a little Hardware Description Language (HDL) skills you can craft these devices to do almost anything digital; video multiplexors, bus interfaces, motor controllers, this list is endless. But in the event that your team does not have these skills, you could be stuck. In the case of signal aggregation, we provide you with the FPGA bitstreams for a variety of popular configurations.
If your team has HDL skills and you want to customize our Single Wire Aggregation Reference Design, we supply the source code as well.